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ab6cd3f1ad
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FIX: fixed bugs in makefiles
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2014-12-03 22:16:51 +01:00 |
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f2da12bbfe
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FIX: fixed some bugs
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2014-12-03 21:57:49 +01:00 |
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ea4ab47f79
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ADD: added makefile support fox doxygen
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2014-02-10 00:12:29 +01:00 |
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55c5390cea
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ADD: short building guide for SPC
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2014-02-09 14:29:22 +01:00 |
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3c7aa408ab
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ADD: ucf file for the generic board target
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2014-02-09 14:21:14 +01:00 |
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3f84d1ded3
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ADD: changes to support the generic board type
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2014-02-09 14:20:49 +01:00 |
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9616b0c8aa
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ADD: License file for project
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2014-02-09 14:20:12 +01:00 |
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6a6b8b6207
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ADD: very small porting guide
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2014-02-09 14:18:43 +01:00 |
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0bfb48125d
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ADD: one more file to remove im cleaned
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2014-02-09 14:05:41 +01:00 |
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94b1a4541a
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FIX: fixed working of TestBench
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2014-02-09 13:56:47 +01:00 |
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8425823f8e
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ADD: added full makefile for isim simulation
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2014-02-09 13:56:19 +01:00 |
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7d23cf7e98
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ADD: top module+ucf file for using processor on an ML 505 FPGA Board
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2014-02-08 22:48:17 +01:00 |
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1174eddcd3
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FIX: regeneration auf Make.sources if .config changes
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2014-02-08 21:56:14 +01:00 |
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52fdf426be
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ADD: added missing files for kconfig
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2014-02-08 21:49:52 +01:00 |
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39a1c045c8
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ADD: ignore eclipse project file and menuconfig config file
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2014-02-08 21:47:06 +01:00 |
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7309e5a4b2
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ADD: added empty Kconfig, for later use in the menuconfig
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2014-02-08 21:46:14 +01:00 |
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9c3c888ca8
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FIX: fixed Testbench to support new SOC port interface
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2014-02-08 21:45:46 +01:00 |
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4703b50e8f
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FIX: corrected description of RAM so, that block ram is used to implement it
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2014-02-08 21:45:11 +01:00 |
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d3e3570ae5
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ADD: added UCF file for spartan3e starter kit
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2014-02-08 21:44:40 +01:00 |
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faae844176
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ADD: added project makefiles with menuconfig support
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2014-02-08 21:44:12 +01:00 |
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5cbcbdd04f
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FIX: fixed wrong instantiation of SimpleFiFo
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2014-02-08 21:42:33 +01:00 |
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8748f946ab
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ADD: rebuild to support different top modules for different FPGA boards
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2014-02-08 21:41:57 +01:00 |
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bf2cba5f78
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ADD: added UCF file for spartan 3e starter kit
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2014-02-08 17:13:38 +01:00 |
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6b9c4576b8
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ADD: added assembler program for printing Geraffel Processor
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2014-01-07 21:35:13 +01:00 |
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c0031f415c
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CHG: changed initial Program to print Geraffel Processor
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2014-01-07 21:34:30 +01:00 |
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0be13ee269
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FIX: fixed Makefile for ML505 Board
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2014-01-07 21:33:36 +01:00 |
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86df98dc86
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ADD: UCF file for Xilinx ML505 Evaluation Board
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2014-01-07 21:33:07 +01:00 |
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4f00cedb90
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ADD: switched to a fork of the used UART
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2014-01-05 03:14:50 +01:00 |
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dbd8ef11a1
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ADD: Module for a Simple Fifo, later used in the UART, to get it running on all FPGAs
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2014-01-05 02:52:21 +01:00 |
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b02a2f5b75
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RM: removed not needed file
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2014-01-05 02:34:48 +01:00 |
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8b9f707b41
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ADD: UCF File for ML505 Evaluation Board
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2013-12-30 15:22:13 +01:00 |
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69e1ffe919
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FIX: license and author information, signal name changes
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2013-12-30 15:11:56 +01:00 |
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75dbc9f109
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FIX: fixed signal name changes
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2013-12-30 15:11:22 +01:00 |
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aa3ed4c103
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FIX: fixed file headers, added licence, formated code
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2013-12-30 14:56:42 +01:00 |
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2ff599262a
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RM: removed unused components
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2013-12-30 14:47:52 +01:00 |
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63c900fc12
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FIX: found bug in Processor core
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2013-07-29 09:25:06 +02:00 |
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c46379c117
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some improvements
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2013-07-26 12:33:01 +02:00 |
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a53abe0ff9
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FIX: fixes and ADD: small assembler
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2013-07-04 16:17:05 +02:00 |
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bc07966401
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IMPROVE: extended to 32bit data and 16bit address, fixed li instruction
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2013-07-02 23:25:46 +02:00 |
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533bae3e02
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ADD: added load immidiate instruction, added UART sources
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2013-07-02 22:32:18 +02:00 |
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6cb6930f68
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ADD: files from university processor core
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2013-07-02 22:15:26 +02:00 |
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