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ADD: added full makefile for isim simulation

This commit is contained in:
Dominik Meyer 2014-02-09 13:56:19 +01:00
parent 7d23cf7e98
commit 8425823f8e
1 changed files with 5 additions and 3 deletions
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8
Makefiles/Makefile.isim
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@ -3,7 +3,7 @@ CLEAN_FILES+=isim.exe
CLEAN_FILES+=fuse.xmsgs fuseRelaunch.cmd isim
isim.prj: $(VHDL_SRC) $(VHDL_PKG) $(VERILOG_SRC)
isim.prj: $(VHDL_SRC) $(VHDL_PKG) $(VHDL_TB) $(VERILOG_SRC)
@sleep 1
@echo "**** Creating Xilinx Project file $@****"
@if [ -e $@ ]; then rm $@; fi
@ -12,6 +12,8 @@ isim.prj: $(VHDL_SRC) $(VHDL_PKG) $(VERILOG_SRC)
@$(foreach f,$(VHDL_SRC),echo "vhdl work $f" >> $@ ;)
@$(foreach f,$(VERILOG_SRC),echo "verilog work $f" >> $@ ;)
isim.exe: isim.prj
@export XILINXD_LICENSE_FILE=$(XILINX_LICENSE);$(XILINX_PATH)/fuse -prj isim.prj -o isim.exe $(TB)
@export XILINXD_LICENSE_FILE=$(XILINX_LICENSE);$(XILINX_PATH)/fuse -prj isim.prj -o isim.exe $(TB)
isimulate: isim.exe
@export XILINXD_LICENSE_FILE=$(XILINX_LICENSE); export XILINX=$(XILINX_PATH)/../../;export LD_LIBRARY_PATH=${XILINX}/lib/lin64;./isim.exe -gui