Merge branch 'master' of git.ti.hsu-hh.de:/home/repos/Paper-Shared/Bibliography

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os.bib
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@ -6,6 +6,20 @@
year={2010},
publisher={Springer}
}
@ARTICLE{os:reconos2,
author={Agne, A. and Happe, M. and Keller, A. and Lubbers, E. and Plattner, B. and Platzner, M. and Plessl, C.},
journal={Micro, IEEE},
title={ReconOS: An Operating System Approach for Reconfigurable Computing},
year={2014},
volume={34},
number={1},
pages={60-71},
abstract={The ReconOS operating system for reconfigurable computing offers a unified multithreaded programming model and OS services for threads executing in software and threads mapped to reconfigurable hardware. The OS interface lets hardware threads interact with software threads using well-known mechanisms such as semaphores, mutexes, condition variables, and message queues. By semantically integrating hardware accelerators into a standard OS environment, ReconOS allows for rapid design-space exploration, supports a structured application development process, and improves the portability of applications between different reconfigurable computing systems.},
keywords={multi-threading;operating systems (computers);reconfigurable architectures;software portability;structured programming;OS services;ReconOS;design-space exploration;hardware accelerators;operating system;reconfigurable computing systems;reconfigurable hardware;structured application development process;thread mapping;unified multithreaded programming model;Computational modeling;Message systems;Operating systems;Programming;Reconfigurable architecturese;Synchronization;multithreading;operating system;reconfigurable computing},
doi={10.1109/MM.2013.110},
ISSN={0272-1732},
month={Jan},}
@article{os:embedded,
title={Embedded Linux platform for data acquisition systems},
@ -37,3 +51,13 @@
year={2010},
organization={IEEE}
}
@INPROCEEDINGS{os:usability,
author={Kwok-Hay So, H. and Brodersen, R.W.},
booktitle={Field Programmable Logic and Applications, 2006. FPL '06. International Conference on},
title={Improving Usability of FPGA-Based Reconfigurable Computers Through Operating System Support},
year={2006},
pages={1-6},
keywords={Linux;field programmable gate arrays;hardware-software codesign;operating system kernels;reconfigurable architectures;BORPH operating system;FPGA resources;FPGA-based reconfigurable computers;Linux operating system;general file system support;hardware processes;high-level applications;kernel support;software-hardware designs;virtual file system;Acceleration;Application software;Bioinformatics;Digital signal processing;Field programmable gate arrays;File systems;Hardware;Operating systems;Speech recognition;Usability},
doi={10.1109/FPL.2006.311236},
month={Aug},}

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@ -56,7 +56,7 @@ language={English}
@PhdThesis{pr:prhs,
author = {M. Eckert},
title = {{FPGA}-Based System Virtual Machines},
school = {Helmut-Schmidt-Universität/Universität der Bundeswehr Hamburg},
school = {Helmut-Schmidt-University Hamburg, Germany},
year = {2014},
}
@ -76,6 +76,14 @@ year = {2014},
address = {New York, NY, USA},
}
@phdthesis{pr:mrp2,
author = {Dominik Meyer},
title = {Multicore Reconfiguration Platform - A Research and Evaluation
FPGA Framework for Runtime Reconfigurable Systems},
school = {Helmut-Schmidt-University Hamburg, Germany},
year = {2015},
}
@article{pr:benefits,
title={Benefits of partial reconfiguration},
author={Kao, Cindy},

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@ -21,9 +21,8 @@
author = {Dominik Meyer},
title = {Multicore Reconfiguration Platform - A Research and Evaluation
FPGA Framework for Runtime Reconfigurable Systems},
school = {Helmut-Schmidt-Universität },
school = {Helmut-Schmidt-University Hamburg, Germany},
year = {2015},
language = {eng},
}
@INPROCEEDINGS{Meyer1,
@ -32,5 +31,6 @@ booktitle={Proceedings of the 41st Annual Conference of the IEEE Industrial Elec
title={Clock Speed Optimization of Partial Runtime Reconfigurable Systems by Signal Latency Measurement},
year={2015},
month={November},
note = {yet to be published}
address = "Yokohama, Japan",
publisher = "IEEE"
}

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@ -6,3 +6,12 @@ month={July},
pages={1-212},
keywords={BSDL;Boundary-Scan Description Language;JTAG;TAP;VHDL;VHSIC Hardware Description Language;boundary scan;boundary-scan architecture;boundary-scan register;circuit boards;circuitry;integrated circuit;printed circuit boards;test;test access port},
doi={10.1109/IEEESTD.2001.92950},}
@ARTICLE{posix,
journal={IEEE Std 1003.1, 2004 Edition},
title={IEEE Standard for Information Technology - Portable Operating System Interface (POSIX(R)) - Base Definitions},
year={2004},
pages={1-3760},
keywords={IEEE standards;Unix;application program interfaces;information technology;software portability;software standards;C-language header definitions;IEEE standard;POSIX/sup /spl reg//;UNIX Specification;applications portability;base definitions;command interpreter;common utility programs;information technology;portable operating system interface;source code level;IEEE standards;Information technology;Software portability;Software standards;CPU;FIFO;X/Open System Interface (XSI;application program interface (API);argument;asynchronous;basic regular expression (BRE);batch job;batch system;built-in utility;byte;child;command language interpreter;extended regular expression (ERE);file access control mechanism;input/output (I/O);job control;network;parent;portable operating system interface (POSIX);shell;stream;string;synchronous;system;thread},
doi={10.1109/IEEESTD.2004.94570},
month={April},}