36 lines
1.3 KiB
Makefile
36 lines
1.3 KiB
Makefile
# include a .config file if existing
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-include .config
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#check for includes
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MF=${shell if [ -e Makefile.files ]; then echo 1; else echo 0; fi}
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MM=${shell if [ -e Makefile.modules ]; then echo 1; else echo 0; fi}
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MC=${shell if [ -e Makefile.PR ]; then echo 1; else echo 0; fi}
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MODULE=$(CURDIR)
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.PHONY : clean
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ifeq ($(MF),1)
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include Makefile.files
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endif
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ifeq ($(MM),1)
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include Makefile.modules
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endif
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Make.sources:
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@echo "**** Creating Make.sources for $(CURDIR)"
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$(foreach f,$(Modules), (cd $f; make -f $(MAKEFILES_PATH)/Makefile.gensources MAKEFILES_PATH=$(MAKEFILES_PATH) $(SUBMAKE) SUBMAKE=$(SUBMAKE) TOPDIR=${TOPDIR} BOARD_TARGET=$(BOARD_TARGET) FPGA_FAMILY=$(FPGA_FAMILY) );)
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$(foreach f,$(Modules), cat $f/Make.sources >> $@;)
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$(foreach f,$(VHDL_SRC), echo VHDL_SRC +=$(MODULE)/$f >> $@;)
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$(foreach f,$(VERILOG_SRC), echo $f | grep -c '^/' >/dev/null; if [ $$? -eq 0 ]; then echo VERILOG_SRC +=$f >> $@; else echo VERILOG_SRC +=$(MODULE)/$f >> $@; fi;)
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$(foreach f,$(VHDL_PKG), echo VHDL_PKG +=$(MODULE)/$f >> $@;)
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$(foreach f,$(VHDL_TB), echo VHDL_TB +=$(MODULE)/$f >> $@;)
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clean:
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@$(foreach f,$(Modules), (cd $f; make -f $(MAKEFILES_PATH)/Makefile.gensources clean);)
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@$(foreach f,$(RM_TUPEL), (src=`echo $f | sed 's/(//' | sed 's/)//' | awk -F',' '{print $$4}'`; cd $$src; make -f $(MAKEFILES_PATH)/Makefile.gensources clean );)
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-@rm Make.sources
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