50 lines
1.4 KiB
VHDL
50 lines
1.4 KiB
VHDL
-------------------------------------------------------
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--! @file
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--! @brief Maps memory devices to a given memory space
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--! @author Dominik Meyer
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--! @email dmeyer@federationhq.de
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--! @date 2010-06-03
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-------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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--! Maps memory devices to a given memory space
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entity MemoryMapper is
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port(
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start : in std_logic_vector(15 downto 0); --! start of memory space
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stop : in std_logic_vector(15 downto 0); --! end of mempry space
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adr_in : in std_logic_vector(15 downto 0);
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req_in : in std_logic; --! ram request type
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req_out : out std_logic; --! ram request type
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enable : out std_logic;
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adr_out : out std_logic_vector(15 downto 0)
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);
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end MemoryMapper;
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--! architecture to map memory devices to memory space
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architecture arch of MemoryMapper is
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begin
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process(adr_in, req_in, start, stop)
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begin
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if (adr_in >= start and adr_in <= stop) then
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req_out <= req_in;
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adr_out <= adr_in-start;
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enable <= '1';
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else
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req_out <= '0';
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enable <= '0';
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adr_out <= (others => 'Z');
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end if;
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end process;
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end arch;
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