FIX: corrected description of RAM so, that block ram is used to implement it
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@ -33,7 +33,7 @@ architecture arch of RAM is
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type MEMORY is ARRAY(0 to 255) of DATA; --! array of data words
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constant Prog1 : MEMORY := ( --! 4k * 32bit of RAM
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signal sRAM : MEMORY := ( --! 4k * 32bit of RAM
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0 => B"00001100001000000000000011001000", --loa $1, 200
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1 => B"01000011111000000000000000001101", --jmc print
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2 => B"00001100001000000000000011001001", --loa $1, 201
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@ -94,7 +94,6 @@ architecture arch of RAM is
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others => (others => '0')
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);
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signal sRam : MEMORY;
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signal tData : DATA;
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@ -107,7 +106,6 @@ begin
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process(iClk, iReset)
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begin
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if (iReset = '1') then
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sRam <= Prog1;
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tData <= (others => '0');
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elsif (rising_edge(iClk)) then
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