90 lines
3.0 KiB
BibTeX
90 lines
3.0 KiB
BibTeX
@book{koch2012partial,
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title={Partial Reconfiguration on {FPGAs}: Architectures, Tools and Applications},
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author={Koch, Dirk},
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volume={153},
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year={2012},
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publisher={Springer}
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}
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@PhdThesis{pr:prhs,
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author = {M.M. Eckert},
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title = {{FPGA}-Based System Virtual Machines},
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school = {Helmut-Schmidt-Universität/Universität der Bundeswehr Hamburg},
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year = {2014},
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}
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@article{pr:mrp,
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author = {Meyer, Dominik and Klauer, Bernd},
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title = {Multicore reconfiguration platform an alternative to {RAMPSoC}},
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journal = {SIGARCH Comput. Archit. News},
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issue_date = {September 2011},
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volume = {39},
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number = {4},
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month = dec,
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year = {2011},
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issn = {0163-5964},
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pages = {102--103},
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numpages = {2},
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publisher = {ACM},
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address = {New York, NY, USA},
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}
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@article{pr:benefits,
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title={Benefits of partial reconfiguration},
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author={Kao, Cindy},
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journal={Xcell journal},
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volume={55},
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pages={65--67},
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year={2005}
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}
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@Manual{pr:xilinx,
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title = {Partial Reconfiguration User Guide},
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year = {2010},
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note = {\url{http://www.xilinx.com}},
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author = {{Xilinx, Inc.}}
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}
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@INPROCEEDINGS{pr:rampsoc0,
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author={Gohringer, D. and Hubner, M. and Schatz, V. and Becker, J.},
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booktitle={Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on}, title={Runtime adaptive multi-processor system-on-chip: RAMPSoC},
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year={2008},
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month=apr,
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volume={},
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number={},
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pages={1 -7},
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keywords={application requirement;high performance computing;reconfigurable hardware;runtime adaptive multiprocessor system-on-chip;electronic design automation;multiprocessing systems;optimising compilers;reconfigurable architectures;system-on-chip;},
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ISSN={1530-2075},}
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@INPROCEEDINGS{pr:rampsoc1,
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author={Gohringer, D. and Hubner, M. and Perschke, T. and Becker, J.},
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booktitle={Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on}, title={New dimensions for multiprocessor architectures: On demand heterogeneity, infrastructure and performance through reconfigurability; the RAMPSoC approach},
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year={2008},
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month= sep,
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volume={},
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number={},
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pages={495 -498},
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keywords={FPGA;RAMPSoC approach;field programmable gate arrays;hardware adaptation;image data processing;multiprocessor hardware architectures;object tracking;field programmable gate arrays;microprocessor chips;reconfigurable architectures;system-on-chip;},
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ISSN={},}
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@InProceedings{pr:Hallmannseder,
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booktitle = {PII Workshop},
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author = {{Daniel} Hallmannseder and {Bernd} Klauer},
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title = {{Compilerunterstützung für die Dynamische Rekonfiguration eines Mikroprozessors}},
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publisher = {Technische Informatik, Helmut-Schmidt-Universität},
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year = {2009},
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address = {Hamburg},
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isbn = {32414234234324}
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}
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@inproceedings{pr:niyonkuru,
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author = {Adronis Niyonkuru and
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Hans Christoph Zeidler},
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title = {Designing a Runtime Reconfigurable Processor for General
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Purpose Applications},
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booktitle = {IPDPS},
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year = {2004},
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bibsource = {DBLP, http://dblp.uni-trier.de}
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}
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