ADD: hardware hardning references

hardware_hardening.bib

@@ -0,0 +1,49 @@
+@inproceedings{Yasin2018,
+	title = "Towards Provably Secure Logic Locking for Hardening Hardware Security",
+	DOI = "10.1109/TEST.2018.8624809",
+	year = "2018",
+	booktitle = "2018 IEEE International Test Conference (ITC)",
+	pages = "1--10",
+	author = "Yasin, Muhammad and Sinanoglu, Ozgur",
+	keywords = "hardware hardening"
+}
+
+@article{Yu2017,
+	title = "Hardware hardening approaches using camouflaging, encryption, and obfuscation",
+	year = "2017",
+	journal = "Hardware IP security and trust",
+	pages = "135--163",
+	author = "Yu, Qiaoyan and Dofe, Jaya and Zhang, Yuejun and Frey, Jonathan",
+	keywords = "hardware hardening"
+}
+
+@inproceedings{10.1145/2897937.2897996,
+author = {Cheng, Eric and Mirkhani, Shahrzad and Szafaryn, Lukasz G. and Cher, Chen-Yong and Cho, Hyungmin and Skadron, Kevin and Stan, Mircea R. and Lilja, Klas and Abraham, Jacob A. and Bose, Pradip and Mitra, Subhasish},
+title = {CLEAR: Cross-Layer Exploration for Architecting Resilience - Combining Hardware and Software Techniques to Tolerate Soft Errors in Processor Cores},
+year = {2016},
+isbn = {9781450342360},
+publisher = {Association for Computing Machinery},
+address = {New York, NY, USA},
+url = {https://doi.org/10.1145/2897937.2897996},
+doi = {10.1145/2897937.2897996},
+booktitle = {Proceedings of the 53rd Annual Design Automation Conference},
+articleno = {68},
+numpages = {6},
+keywords = {soft errors, cross-layer resilience},
+location = {Austin, Texas},
+series = {DAC '16}
+}
+
+@article{COPPOLINO2019100055,
+title = {A comprehensive survey of hardware-assisted security: From the edge to the cloud},
+journal = {Internet of Things},
+volume = {6},
+pages = {100055},
+year = {2019},
+issn = {2542-6605},
+doi = {https://doi.org/10.1016/j.iot.2019.100055},
+url = {https://www.sciencedirect.com/science/article/pii/S2542660519300101},
+author = {Luigi Coppolino and Salvatore D’Antonio and Giovanni Mazzeo and Luigi Romano},
+keywords = {Hardware-assisted security, IoT security, Cloud security, Edge computing, Trusted computing},
+abstract = {Sensitive data processing occurs more and more on machines or devices out of users control. In the Internet of Things world, for example, the security of data could be posed at risk regardless the adopted deployment is oriented on Cloud or Edge Computing. In these systems different categories of attacks—such as physical bus sniffing, cold boot, cache side-channel, buffer overflow, code-reuse, or Iago—can be realized. Software-based countermeasures have been proposed. However, the severity and complexity of these attacks require a level of security that only the hardware support can ensure. In the last years, major companies released a number of architectural extensions aiming at provide hardware-assisted security to software. In this paper, we realize a comprehensive survey of HW-assisted technological solutions produced by vendors like Intel, AMD, and ARM for both embedded edge-devices and hosting machines such as cloud servers. The different approaches are classified based on the type of attacks prevented and the enforced techniques. An analysis on their mechanisms, issues, and market adoption is provided to support investigations of researchers approaching to this field of systems security.}
+}