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ADD: more OS references

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Dominik Meyer 6 years ago
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  1. 20
      os.bib

20
os.bib

@ -71,3 +71,23 @@ month={Aug},} @@ -71,3 +71,23 @@ month={Aug},}
urldate = {2016-01-31},
url = {http://en.wikipedia.org/w/index.php?title=Linux&oldid=597293747},
}
@INPROCEEDINGS{os:dyract,
author={Vipin, K. and Fahmy, S.A.},
booktitle={Field Programmable Logic and Applications (FPL), 2014 24th International Conference on},
title={DyRACT: A partial reconfiguration enabled accelerator and test platform},
year={2014},
pages={1-7},
keywords={application program interfaces;field programmable gate arrays;peripheral interfaces;API;DyRACT;PCIe interface;PR management logic;PR-enabled FPGA platform;data transfer;field programmable gate arrays;high level functions;partial reconfiguration enabled accelerator;static region;test platform;user modules;Clocks;Data transfer;Field programmable gate arrays;Hardware;Registers;Software;Throughput},
doi={10.1109/FPL.2014.6927507},
month={Sept},}
@INPROCEEDINGS{os:riffa20,
author={Jacobsen, M. and Kastner, R.},
booktitle={Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on},
title={RIFFA 2.0: A reusable integration framework for FPGA accelerators},
year={2013},
pages={1-8},
keywords={field programmable gate arrays;logic design;synchronisation;C/C++;FPGA accelerated applications;FPGA accelerators;FPGA cores;Java;Linux operating system;PCIe link configurations;Python bindings;RIFFA 2.0;Windows operating system;Xilinx FPGA;acceleration platform;commodity CPU;data transfers;open source;reusable integration framework;synchronization;system bus;Acceleration;Clocks;Field programmable gate arrays;Hardware;Protocols;Software;Workstations},
doi={10.1109/FPL.2013.6645504},
month={Sept},}

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