ADD: ein paar einträge

This commit is contained in:
Dominik Meyer 2015-08-08 22:20:53 +02:00
parent d556d8f03b
commit d245f77c77
2 changed files with 24 additions and 6 deletions

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@ -22,4 +22,21 @@
timestamp = {Wed, 10 Oct 2012 21:28:55 +0200}, timestamp = {Wed, 10 Oct 2012 21:28:55 +0200},
biburl = {http://dblp.uni-trier.de/rec/bib/journals/corr/abs-1208-4490}, biburl = {http://dblp.uni-trier.de/rec/bib/journals/corr/abs-1208-4490},
bibsource = {dblp computer science bibliography, http://dblp.org} bibsource = {dblp computer science bibliography, http://dblp.org}
}
@incollection{app_fpga_accel,
year={2015},
isbn={978-3-319-16213-3},
booktitle={Applied Reconfigurable Computing},
volume={9040},
series={Lecture Notes in Computer Science},
editor={Sano, Kentaro and Soudris, Dimitrios and Hübner, Michael and Diniz, Pedro C.},
doi={10.1007/978-3-319-16214-0_34},
title={A Challenge of Portable and High-Speed FPGA Accelerator},
url={http://dx.doi.org/10.1007/978-3-319-16214-0_34},
publisher={Springer International Publishing},
keywords={FPGA; Accelerator; Portable; High-speed; Sorting},
author={Usui, Takuma and Kobayashi, Ryohei and Kise, Kenji},
pages={383-392},
language={English}
} }

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@ -27,10 +27,11 @@ FPGA Framework for Runtime Reconfigurable Systems},
language = {eng}, language = {eng},
} }
@Unpublished{Meyer1, @INPROCEEDINGS{Meyer1,
author = {Meyer, Dominik and Haase, Jan and Eckert, Marcel and Klauer, Bernd}, author={Meyer, Dominik and Haase, Jan and Eckert, Marcel and Klauer, Bernd},
title = {Clock Speed Optimization of Partial Runtime Reconfigurable Systems by Signal Latency Measurement}, booktitle={Proceedings of the 41st Annual Conference of the IEEE Industrial Electronics Society},
note = {submitted for publication at the International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies}, title={Clock Speed Optimization of Partial Runtime Reconfigurable Systems by Signal Latency Measurement},
year = {2015}, year={2015},
month = jun month={November},
note = {yet to be published}
} }