ADD: ein paar einträge

fpga_applications.bib

@@ -22,4 +22,21 @@
   timestamp = {Wed, 10 Oct 2012 21:28:55 +0200},
   biburl    = {http://dblp.uni-trier.de/rec/bib/journals/corr/abs-1208-4490},
   bibsource = {dblp computer science bibliography, http://dblp.org}
+}
+
+@incollection{app_fpga_accel,
+year={2015},
+isbn={978-3-319-16213-3},
+booktitle={Applied Reconfigurable Computing},
+volume={9040},
+series={Lecture Notes in Computer Science},
+editor={Sano, Kentaro and Soudris, Dimitrios and Hübner, Michael and Diniz, Pedro C.},
+doi={10.1007/978-3-319-16214-0_34},
+title={A Challenge of Portable and High-Speed FPGA Accelerator},
+url={http://dx.doi.org/10.1007/978-3-319-16214-0_34},
+publisher={Springer International Publishing},
+keywords={FPGA; Accelerator; Portable; High-speed; Sorting},
+author={Usui, Takuma and Kobayashi, Ryohei and Kise, Kenji},
+pages={383-392},
+language={English}
 }

publications_dmeyer.bib

@@ -27,10 +27,11 @@ FPGA Framework for Runtime Reconfigurable Systems},
     language = {eng},
 }
 
-@Unpublished{Meyer1,
-  author = 	 {Meyer, Dominik and Haase, Jan and Eckert, Marcel and Klauer, Bernd},
-  title = 	 {Clock Speed Optimization of Partial Runtime Reconfigurable Systems by Signal Latency Measurement},
-  note = 	 {submitted for publication at the International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies},
-  year = {2015},
-  month = jun
+@INPROCEEDINGS{Meyer1,
+author={Meyer, Dominik and Haase, Jan and Eckert, Marcel and Klauer, Bernd},
+booktitle={Proceedings of the 41st Annual Conference of the IEEE Industrial Electronics Society},
+title={Clock Speed Optimization of Partial Runtime Reconfigurable Systems by Signal Latency Measurement},
+year={2015},
+month={November},
+note = 	 {yet to be published}
 }