Browse Source

ADD: some initial bibfiles

main
Dominik Meyer 8 years ago
parent
commit
a3f3c9a318
  1. 45
      base.bib
  2. 62
      network.bib
  3. 59
      partial_reconfiguration.bib
  4. 11
      path_delay.bib
  5. 18
      publications_dmeyer.bib

45
base.bib

@ -0,0 +1,45 @@ @@ -0,0 +1,45 @@
@article{Moore1965,
author = {Gordon E. Moore},
title = {Cramming more components onto integrated circuits},
journal = {Electronics},
volume = {38},
number = {8},
year = {1965},
pages = {114-117}
}
@ARTICLE{illiac,
author={Barnes, G.H. and Brown, R.M. and Kato, M. and Kuck, David J. and Slotnick, D.L. and Stokes, R.A},
journal={Computers, IEEE Transactions on},
title={The ILLIAC IV Computer},
year={1968},
month={Aug},
volume={C-17},
number={8},
pages={746-757},
keywords={Index Terms—Array, computer structure, look-ahead, machine language, parallel processing, speed, thin-film memory.;Arithmetic;Associate members;Centralized control;Computer aided instruction;Computer science;Concurrent computing;Costs;LAN interconnection;Parallel processing;Phased arrays;Index Terms—Array, computer structure, look-ahead, machine language, parallel processing, speed, thin-film memory.},
doi={10.1109/TC.1968.229158},
ISSN={0018-9340},}
@article{vonNeumann,
title={First Draft of a Report on the EDVAC},
author={Von Neumann, John},
journal={IEEE Annals of the History of Computing},
volume={15},
number={4},
pages={27--75},
year={1993},
publisher={IEEE Computer Society} }
@ARTICLE{highksolution,
author={Bohr, M.T. and Chau, R.S. and Ghani, T. and Mistry, K.},
journal={Spectrum, IEEE}, title={The High-k Solution},
year={2007},
month={oct. },
volume={44},
number={10},
pages={29 -35},
keywords={CMOS process technology;Intel's Core 2 microprocessors;MOSFET;high-k dielectric;size 45 nm;CMOS digital integrated circuits;high-k dielectric thin films;microprocessor chips;},
doi={10.1109/MSPEC.2007.4337663},
ISSN={0018-9235},}

62
network.bib

@ -0,0 +1,62 @@ @@ -0,0 +1,62 @@
@article{net:osi,
title={X.200 : Information technology - Open Systems Interconnection - Basic Reference Model: The basic model},
url={http://www.iso.org/iso/iso_catalogue/catalogue_tc/catalogue_detail.htm?csnumber=20269},
number={7498-1},
journal={ISOIEC},
publisher={International Organization for Standardization},
author={Itu-T, I T U Telecommunication Standardization Sector},
year={1994},
pages={59}
}
@article{net:tan,
author = {Andrew S. Tanenbaum},
title = {Network Protocols},
journal = {ACM Comput. Surv.},
volume = {13},
number = {4},
year = {1981},
pages = {453-489},
ee = {http://doi.acm.org/10.1145/356859.356864},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@ARTICLE{net:feng,
author={Tse-Yun Feng},
journal={Computer},
title={A Survey of Interconnection Networks},
year={1981},
volume={14},
number={12},
pages={12-27},
keywords={Centralized control;Communication switching;Communication system control;Hardware;Integrated circuit interconnections;Multiprocessor interconnection networks;Network topology;Packet switching;Switches;Switching circuits},
doi={10.1109/C-M.1981.220290},
ISSN={0018-9162},}
@article{net:noc0,
author = {Bjerregaard, Tobias and Mahadevan, Shankar},
title = {A survey of research and practices of Network-on-chip},
journal = {ACM Comput. Surv.},
issue_date = {2006},
volume = {38},
number = {1},
year = {2006},
issn = {0360-0300},
articleno = {1},
url = {http://doi.acm.org/http://doi.acm.org/10.1145/1132952.1132953},
doi = {http://doi.acm.org/10.1145/1132952.1132953},
acmid = {1132953},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {Chip-area networks, GALS, GSI design, NoC, OCP, SoC, ULSI design, communication abstractions, communication-centric design, interconnects, network-on-chip, on-chip communication, sockets, system-on-chip},
}
@book{verbindungsnetze,
title={Verbindungsnetze},
author={Schwederski, T. and Jurczyk, M.},
isbn={9783519021346},
series={Leitf{\"a}den der Informatik},
url={http://books.google.de/books?id=JhEyAAAACAAJ},
year={1996},
publisher={Teubner}
}

59
partial_reconfiguration.bib

@ -0,0 +1,59 @@ @@ -0,0 +1,59 @@
@article{pr:benefits,
title={Benefits of partial reconfiguration},
author={Kao, Cindy},
journal={Xcell journal},
volume={55},
pages={65--67},
year={2005}
}
@Manual{pr:xilinx,
title = {Partial Reconfiguration User Guide},
year = {2010},
note = {\url{http://www.xilinx.com}},
author = {{Xilinx, Inc.}}
}
@INPROCEEDINGS{pr:rampsoc0,
author={Gohringer, D. and Hubner, M. and Schatz, V. and Becker, J.},
booktitle={Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on}, title={Runtime adaptive multi-processor system-on-chip: RAMPSoC},
year={2008},
month=apr,
volume={},
number={},
pages={1 -7},
keywords={application requirement;high performance computing;reconfigurable hardware;runtime adaptive multiprocessor system-on-chip;electronic design automation;multiprocessing systems;optimising compilers;reconfigurable architectures;system-on-chip;},
doi={10.1109/IPDPS.2008.4536503},
ISSN={1530-2075},}
@INPROCEEDINGS{pr:rampsoc1,
author={Gohringer, D. and Hubner, M. and Perschke, T. and Becker, J.},
booktitle={Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on}, title={New dimensions for multiprocessor architectures: On demand heterogeneity, infrastructure and performance through reconfigurability; the RAMPSoC approach},
year={2008},
month= sep,
volume={},
number={},
pages={495 -498},
keywords={FPGA;RAMPSoC approach;field programmable gate arrays;hardware adaptation;image data processing;multiprocessor hardware architectures;object tracking;field programmable gate arrays;microprocessor chips;reconfigurable architectures;system-on-chip;},
doi={10.1109/FPL.2008.4629992},
ISSN={},}
@InProceedings{pr:Hallmannseder,
booktitle = {PII Workshop},
author = {{Daniel} Hallmannseder and {Bernd} Klauer},
title = {{Compilerunterstützung für die Dynamische Rekonfiguration eines Mikroprozessors}},
publisher = {Technische Informatik, Helmut-Schmidt-Universität},
year = {2009},
address = {Hamburg},
isbn = {32414234234324}
}
@inproceedings{pr:niyonkuru,
author = {Adronis Niyonkuru and
Hans Christoph Zeidler},
title = {Designing a Runtime Reconfigurable Processor for General
Purpose Applications},
booktitle = {IPDPS},
year = {2004},
bibsource = {DBLP, http://dblp.uni-trier.de}
}

11
path_delay.bib

@ -0,0 +1,11 @@ @@ -0,0 +1,11 @@
@INPROCEEDINGS{path_delay_measurement,
author={Ruffoni, M. and Bogliolo, A.},
booktitle={Signal Propagation on Interconnects, 6th IEEE Workshop on. Proceedings}, title={Direct Measures of Path Delays on Commercial FPGA Chips},
year={2002},
month={may},
volume={},
number={},
pages={157 -159},
keywords={Field programmable gate arrays;Frequency;Inverters;Propagation delay;Ring oscillators;Routing;Semiconductor device measurement;Testing;Timing;Wire;},
doi={10.1109/SPI.2002.258304},
ISSN={},}

18
publications_dmeyer.bib

@ -0,0 +1,18 @@ @@ -0,0 +1,18 @@
@article{Meyer0,
author = {Meyer, Dominik and Klauer, Bernd},
title = {Multicore reconfiguration platform an alternative to RAMPSoC},
journal = {SIGARCH Comput. Archit. News},
issue_date = {September 2011},
volume = {39},
number = {4},
month = dec,
year = {2011},
issn = {0163-5964},
pages = {102--103},
numpages = {2},
url = {http://doi.acm.org/10.1145/2082156.2082185},
doi = {10.1145/2082156.2082185},
acmid = {2082185},
publisher = {ACM},
address = {New York, NY, USA},
}
Loading…
Cancel
Save