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ADD: added one submitted paper of dmeyer and some new publications about partial reconfigurable systems

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Dominik Meyer 7 years ago
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  1. 30
      partial_reconfiguration.bib
  2. 16
      path_delay.bib
  3. 10
      publications_dmeyer.bib

30
partial_reconfiguration.bib

@ -1,3 +1,33 @@ @@ -1,3 +1,33 @@
@INPROCEEDINGS{pr:prhmpsoc,
author={Nguyen, T.D.A. and Kumar, A.},
booktitle={Field Programmable Logic and Applications (FPL), 2014 24th International Conference on},
title={PR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems},
year={2014},
month={Sept},
pages={1-6},
keywords={embedded systems;field programmable gate arrays;multiprocessing systems;network-on-chip;reconfigurable architectures;FPGA chip;PR microblaze-hardware accelerators;PR-HMPSoC;bitstream relocation;dynamic FPGA;embedded systems;hardware-software task migration;heterogeneous multiprocessor systems-on-chip;network-on-chip;partially reconfigurable FPGA architectures;powerful computational ability;Clocks;Field programmable gate arrays;Hardware;Loading;Memory management;Program processors;FPGA;bitstream relocation;debug;heterogeneous;multiprocessor;partial reconfiguration;task migration},
doi={10.1109/FPL.2014.6927492},}
@article{pr:Gohringer:2014,
author = {G\"{o}hringer, Diana},
title = {Reconfigurable Multiprocessor Systems: Handling Hydras Heads -- A Survey},
journal = {SIGARCH Comput. Archit. News},
issue_date = {Setember 2014},
volume = {42},
number = {4},
month = dec,
year = {2014},
issn = {0163-5964},
pages = {39--44},
numpages = {6},
url = {http://doi.acm.org/10.1145/2693714.2693722},
doi = {10.1145/2693714.2693722},
acmid = {2693722},
publisher = {ACM},
address = {New York, NY, USA},
}
@article{pr:multicore,
year={2014},
issn={1018-4864},

16
path_delay.bib

@ -78,4 +78,18 @@ volume={15}, @@ -78,4 +78,18 @@ volume={15},
number={12},
pages={1505-1517},
keywords={VLSI;circuit layout CAD;delays;field programmable gate arrays;integrated circuit design;logic CAD;logic partitioning;network routing;trees (mathematics);FPGA;Steiner algorithms;Steiner tree constructions;Xilinx parts;arborescence algorithms;channel width;optimal source-sink pathlengths;performance bounds;routing algorithms;routing solutions;wirelength;Algorithm design and analysis;Circuit simulation;Computer science;Construction industry;Field programmable gate arrays;Flexible printed circuits;Propagation delay;Routing;Steiner trees;Very large scale integration},
}
}
@INPROCEEDINGS{pdm:ro1,
author={Jiliang Zhang and Qiang Wu and Yongqiang Lyu and Qiang Zhou and Yici Cai and Yaping Lin and Gang Qu},
booktitle={Computer-Aided Design and Computer Graphics (CAD/Graphics), 2013 International Conference on},
title={Design and Implementation of a Delay-Based PUF for FPGA IP Protection},
year={2013},
month={Nov},
pages={107-114},
keywords={copy protection;delays;digital rights management;field programmable gate arrays;industrial property;logic design;oscillators;Anderson PUF;FPGA IP protection;RO based PUF;arbiter-based PUF;challenge-response pairs;delay-based PUF;digital rights management;field programmable gate arrays;hard macros;intellectual property;key generation;physical unclonable function;resource overhead;ring oscillator;uncontrollable process variations;Delays;Fabrication;Field programmable gate arrays;Multiplexing;Random access memory;Shift registers;Table lookup;EDA;FPGAs;IP cores;fabrication variation;fingerprint;hardware security;intellectual property (IP) protection;physical unclonable functions (PUFs);watermarking},
}

10
publications_dmeyer.bib

@ -15,4 +15,12 @@ @@ -15,4 +15,12 @@
acmid = {2082185},
publisher = {ACM},
address = {New York, NY, USA},
}
}
@Unpublished{Meyer1,
author = {Meyer, Dominik and Haase, Jan and Eckert, Marcel and Klauer, Bernd},
title = {Clock Speed Optimization of Partial Runtime Reconfigurable Systems by Signal Latency Measurement},
note = {submitted for publication at the International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies},
year = {2015},
month = jun
}
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